[PATCH] D58872: [InstCombine] Start canonicalizing to uadd.sat and usub.sat
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 3 09:12:04 PST 2019
spatel added a comment.
In D58872#1416441 <https://reviews.llvm.org/D58872#1416441>, @nikic wrote:
> @spatel We're not lowering optimally, e.g. not using UQADD and friends on AArch64. They're not going to be used with expanded IR either though, only via target intrinsics. I can take a look at improving that first.
Sounds good. I think this is the right transform in IR, but if there's anything we can do in advance to ensure that codegen doesn't regress, that's always best.
I don't think it will be affected with this patch yet, but I'm looking at 1 more x86 or general vector codegen improvement for min/max in PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
...and then I think we can also convert min/max patterns to uadd.sat in IR.
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https://reviews.llvm.org/D58872/new/
https://reviews.llvm.org/D58872
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