[PATCH] D58873: [ARM][MC] Update one test case in 'test/MC/Disassembler/ARM/invalid-armv7.txt'

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Higuoxing created this revision.
Higuoxing added reviewers: fhahn, efriedma.
Herald added subscribers: llvm-commits, kristof.beyls, javed.absar.
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Instruction `[0xfe 0xf0 0x20 0xe3]` is a valid instruction on ARM-v7, which is `dbg #14`. See: 
https://www.cl.cam.ac.uk/research/srg/han/ACS-P35/zynq/ARMv7-A-R-manual.pdf 
(Page: 377)

  Encoding A1:
  DBG<c> #<option>
  
  |31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16|15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00|
  |      cond | 0  0  1  1  0| 0| 1  0| 0  0  0  0| 1  1  1  1| 0  0  0  0| 1  1  1  1|    option |


Repository:
  rL LLVM

https://reviews.llvm.org/D58873

Files:
  test/MC/Disassembler/ARM/invalid-armv7.txt


Index: test/MC/Disassembler/ARM/invalid-armv7.txt
===================================================================
--- test/MC/Disassembler/ARM/invalid-armv7.txt
+++ test/MC/Disassembler/ARM/invalid-armv7.txt
@@ -69,9 +69,8 @@
 # Undefined encoding space for hint instructions
 #------------------------------------------------------------------------------
 
-# FIXME: is it "dbg #14" or not????
-[0xfe 0xf0 0x20 0xe3]
-# CHCK: invalid instruction encoding
+[0xfe 0xf0 0x20 0xf3]
+# CHECK: invalid instruction encoding
 
 
 #------------------------------------------------------------------------------


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