[PATCH] D58684: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 26 09:47:55 PST 2019
aemerson created this revision.
aemerson added a reviewer: paquette.
aemerson added a project: LLVM.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.
This extends the existing support for shufflevector to handle cases like <2 x float>, which we can implement by concating the vectors and using a TBL1.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D58684
Files:
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
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