[llvm] r354677 - Disable big-endian constant store merges from rL354676.

Nirav Dave via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 22 08:20:34 PST 2019


Author: niravd
Date: Fri Feb 22 08:20:34 2019
New Revision: 354677

URL: http://llvm.org/viewvc/llvm-project?rev=354677&view=rev
Log:
Disable big-endian constant store merges from rL354676.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=354677&r1=354676&r2=354677&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Feb 22 08:20:34 2019
@@ -15450,16 +15450,17 @@ SDValue DAGCombiner::visitSTORE(SDNode *
             if (auto *C = dyn_cast<ConstantSDNode>(Value)) {
               APInt Val = C1->getAPIntValue();
               APInt InsertVal = C->getAPIntValue().zextOrTrunc(STByteSize * 8);
-              if (DAG.getDataLayout().isBigEndian())
-                Offset = ChainByteSize - 1 - Offset;
-              Val.insertBits(InsertVal, Offset * 8);
-              SDValue NewSDVal =
-                  DAG.getConstant(Val, SDLoc(C), ChainValue.getValueType(),
-                                  C1->isTargetOpcode(), C1->isOpaque());
-              SDNode *NewST1 = DAG.UpdateNodeOperands(
-                  ST1, ST1->getChain(), NewSDVal, ST1->getOperand(2),
-                  ST1->getOperand(3));
-              return CombineTo(ST, SDValue(NewST1, 0));
+              // FIXME: Handle Big-endian mode.
+              if (!DAG.getDataLayout().isBigEndian()) {
+                Val.insertBits(InsertVal, Offset * 8);
+                SDValue NewSDVal =
+                    DAG.getConstant(Val, SDLoc(C), ChainValue.getValueType(),
+                                    C1->isTargetOpcode(), C1->isOpaque());
+                SDNode *NewST1 = DAG.UpdateNodeOperands(
+                    ST1, ST1->getChain(), NewSDVal, ST1->getOperand(2),
+                    ST1->getOperand(3));
+                return CombineTo(ST, SDValue(NewST1, 0));
+              }
             }
           }
         } // End ST subset of ST1 case.

Modified: llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll?rev=354677&r1=354676&r2=354677&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll Fri Feb 22 08:20:34 2019
@@ -1,13 +1,14 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=powerpc64-unknown-linux-gnu   -o - %s | FileCheck --check-prefix=BE %s 
+; RUN: llc -mtriple=powerpc64-unknown-linux-gnu   -o - %s | FileCheck --check-prefix=BE %s
 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -o - %s | FileCheck --check-prefix=LE %s
 
 define void @fold_constant_stores_loaddr(i8* %i8_ptr) {
 ; BE-LABEL: fold_constant_stores_loaddr:
 ; BE:       # %bb.0: # %entry
-; BE-NEXT:    li 4, 85
-; BE-NEXT:    sldi 4, 4, 57
+; BE-NEXT:    li 4, 0
 ; BE-NEXT:    std 4, 0(3)
+; BE-NEXT:    li 4, -86
+; BE-NEXT:    stb 4, 0(3)
 ; BE-NEXT:    blr
 ;
 ; LE-LABEL: fold_constant_stores_loaddr:
@@ -26,9 +27,10 @@ entry:
 define void @fold_constant_stores_hiaddr(i8* %i8_ptr) {
 ; BE-LABEL: fold_constant_stores_hiaddr:
 ; BE:       # %bb.0: # %entry
-; BE-NEXT:    li 4, 85
-; BE-NEXT:    sldi 4, 4, 57
+; BE-NEXT:    li 4, 0
 ; BE-NEXT:    std 4, 0(3)
+; BE-NEXT:    li 4, -86
+; BE-NEXT:    stb 4, 0(3)
 ; BE-NEXT:    blr
 ;
 ; LE-LABEL: fold_constant_stores_hiaddr:




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