[llvm] r354611 - [Hexagon] Use misaligned load instead of trap0(#0) for __builtin_trap
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 21 11:42:39 PST 2019
Author: kparzysz
Date: Thu Feb 21 11:42:39 2019
New Revision: 354611
URL: http://llvm.org/viewvc/llvm-project?rev=354611&view=rev
Log:
[Hexagon] Use misaligned load instead of trap0(#0) for __builtin_trap
The trap instruction is intercepted by various runtime environments,
and instead of a crash it creates confusion.
This reapplies r354606 with a fix.
Added:
llvm/trunk/test/CodeGen/Hexagon/trap-crash.ll
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
llvm/trunk/lib/Target/Hexagon/HexagonPatterns.td
llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td
llvm/trunk/test/CodeGen/Hexagon/trap-unreachable.ll
Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=354611&r1=354610&r2=354611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Thu Feb 21 11:42:39 2019
@@ -1313,6 +1313,38 @@ bool HexagonInstrInfo::expandPostRAPseud
return true;
}
+ case Hexagon::PS_crash: {
+ // Generate a misaligned load that is guaranteed to cause a crash.
+ class CrashPseudoSourceValue : public PseudoSourceValue {
+ public:
+ CrashPseudoSourceValue(const TargetInstrInfo &TII)
+ : PseudoSourceValue(TargetCustom, TII) {}
+
+ bool isConstant(const MachineFrameInfo *) const override {
+ return false;
+ }
+ bool isAliased(const MachineFrameInfo *) const override {
+ return false;
+ }
+ bool mayAlias(const MachineFrameInfo *) const override {
+ return false;
+ }
+ void printCustom(raw_ostream &OS) const override {
+ OS << "MisalignedCrash";
+ }
+ };
+
+ static const CrashPseudoSourceValue CrashPSV(*this);
+ MachineMemOperand *MMO = MF.getMachineMemOperand(
+ MachinePointerInfo(&CrashPSV),
+ MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile, 8, 1);
+ BuildMI(MBB, MI, DL, get(Hexagon::PS_loadrdabs), Hexagon::D13)
+ .addImm(0xBADC0FEE) // Misaligned load.
+ .addMemOperand(MMO);
+ MBB.erase(MI);
+ return true;
+ }
+
case Hexagon::PS_tailcall_i:
MI.setDesc(get(Hexagon::J2_jump));
return true;
Modified: llvm/trunk/lib/Target/Hexagon/HexagonPatterns.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonPatterns.td?rev=354611&r1=354610&r2=354611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonPatterns.td (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonPatterns.td Thu Feb 21 11:42:39 2019
@@ -3081,7 +3081,7 @@ def: Pat<(HexagonALLOCA I32:$Rs, (i32 im
def HexagonBARRIER: SDNode<"HexagonISD::BARRIER", SDTNone, [SDNPHasChain]>;
def: Pat<(HexagonBARRIER), (Y2_barrier)>;
-def: Pat<(trap), (J2_trap0 (i32 0))>;
+def: Pat<(trap), (PS_crash)>;
// Read cycle counter.
def SDTInt64Leaf: SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
Modified: llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td?rev=354611&r1=354610&r2=354611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td Thu Feb 21 11:42:39 2019
@@ -559,3 +559,8 @@ defm PS_storerh : NewCircularStore<IntRe
defm PS_storerf : NewCircularStore<IntRegs, HalfWordAccess>;
defm PS_storeri : NewCircularStore<IntRegs, WordAccess>;
defm PS_storerd : NewCircularStore<DoubleRegs, WordAccess>;
+
+// A pseudo that generates a runtime crash. This is used to implement
+// __builtin_trap.
+let hasSideEffects = 1, isPseudo = 1, isCodeGenOnly = 1, isSolo = 1 in
+def PS_crash: InstHexagon<(outs), (ins), "", [], "", PSEUDO, TypePSEUDO>;
Added: llvm/trunk/test/CodeGen/Hexagon/trap-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/trap-crash.ll?rev=354611&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/trap-crash.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/trap-crash.ll Thu Feb 21 11:42:39 2019
@@ -0,0 +1,20 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Generate code that is guaranteed to crash. At the moment, it's a
+; misaligned load.
+; CHECK: memd(##3134984174)
+
+target triple = "hexagon"
+
+; Function Attrs: noreturn nounwind
+define i32 @f0() #0 {
+entry:
+ tail call void @llvm.trap()
+ unreachable
+}
+
+; Function Attrs: cold noreturn nounwind
+declare void @llvm.trap() #1
+
+attributes #0 = { noreturn nounwind "target-cpu"="hexagonv60" }
+attributes #1 = { cold noreturn nounwind }
Modified: llvm/trunk/test/CodeGen/Hexagon/trap-unreachable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/trap-unreachable.ll?rev=354611&r1=354610&r2=354611&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/trap-unreachable.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/trap-unreachable.ll Thu Feb 21 11:42:39 2019
@@ -1,5 +1,7 @@
; RUN: llc -march=hexagon -trap-unreachable < %s | FileCheck %s
-; CHECK: trap
+
+; Trap is implemented via a misaligned load.
+; CHECK: memd(##3134984174)
define void @fred() #0 {
unreachable
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