[llvm] r354436 - [X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs

[Craig Topper via llvm-commits]

Author: ctopper
Date: Tue Feb 19 21:39:11 2019
New Revision: 354436

URL: http://llvm.org/viewvc/llvm-project?rev=354436&view=rev
Log:
[X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs

Summary:
Inc and Dec were at one point slow on Intel CPUs due to their tendency to cause partial flag stalls on P6 derived CPU cores. This is because these instructions are defined to preserve the carry flag. This partial flag stall issue persisted until Sandy Bridge when flag merging was changed to be handled as a data dependency instead of as a stall until retirement. Sandy Bridge and later CPUs rename the C flag separately from OSPAZ so there is no flag merge needed on INC/DEC to preserve the C flag.

Given these improvements I don't know why INC/DEC was ever considered slow on Sandy Bridge. If anything they should have been disabled on the earlier CPUs instead.

Note after this patch, INC/DEC are still considered slow on Silvermont, Goldmont, Knights Landing and our generic "x86-64" CPU.

Reviewers: spatel, RKSimon, chandlerc

Reviewed By: chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D58412

Modified:
    llvm/trunk/lib/Target/X86/X86.td
    llvm/trunk/test/CodeGen/X86/mul-constant-result.ll
    llvm/trunk/test/CodeGen/X86/rdrand.ll

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=354436&r1=354435&r2=354436&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue Feb 19 21:39:11 2019
@@ -733,7 +733,6 @@ def SNBFeatures : ProcessorFeatures<[],
   FeatureSlow3OpsLEA,
   FeatureFastScalarFSQRT,
   FeatureFastSHLDRotate,
-  FeatureSlowIncDec,
   FeatureMergeToThreeWayBranch,
   FeatureMacroFusion
 ]>;

Modified: llvm/trunk/test/CodeGen/X86/mul-constant-result.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-result.ll?rev=354436&r1=354435&r2=354436&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-result.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-result.ll Tue Feb 19 21:39:11 2019
@@ -254,7 +254,7 @@ define i32 @mult(i32, i32) local_unnamed
 ; X64-HSW-NEXT:    cmovgl %ecx, %eax
 ; X64-HSW-NEXT:    testl %esi, %esi
 ; X64-HSW-NEXT:    cmovel %ecx, %eax
-; X64-HSW-NEXT:    addl $-1, %edi
+; X64-HSW-NEXT:    decl %edi
 ; X64-HSW-NEXT:    cmpl $31, %edi
 ; X64-HSW-NEXT:    ja .LBB0_36
 ; X64-HSW-NEXT:  # %bb.1:

Modified: llvm/trunk/test/CodeGen/X86/rdrand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdrand.ll?rev=354436&r1=354435&r2=354436&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdrand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdrand.ll Tue Feb 19 21:39:11 2019
@@ -94,7 +94,7 @@ define void @loop(i32* %p, i32 %n) nounw
 ; X86-NEXT:    # =>This Inner Loop Header: Depth=1
 ; X86-NEXT:    rdrandl %esi
 ; X86-NEXT:    movl %esi, (%ecx,%edx,4)
-; X86-NEXT:    addl $1, %edx
+; X86-NEXT:    incl %edx
 ; X86-NEXT:    cmpl %edx, %eax
 ; X86-NEXT:    jne .LBB3_2
 ; X86-NEXT:  .LBB3_3: # %while.end
@@ -113,7 +113,7 @@ define void @loop(i32* %p, i32 %n) nounw
 ; X64-NEXT:    # =>This Inner Loop Header: Depth=1
 ; X64-NEXT:    rdrandl %edx
 ; X64-NEXT:    movl %edx, (%rdi,%rcx,4)
-; X64-NEXT:    addq $1, %rcx
+; X64-NEXT:    incq %rcx
 ; X64-NEXT:    cmpl %ecx, %eax
 ; X64-NEXT:    jne .LBB3_2
 ; X64-NEXT:  .LBB3_3: # %while.end