[llvm] r354160 - Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."

[Jonas Paulsson via llvm-commits]

Author: jonpa
Date: Fri Feb 15 11:13:55 2019
New Revision: 354160

URL: http://llvm.org/viewvc/llvm-project?rev=354160&view=rev
Log:
Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."

It seems there were some problem with using a .mir test. For some reason
doing '-stop-before=codegenprepare' and then '-start-before=codegenprepare'
on the output .mir file results in the NoVRegs Property after instruction
selection.

Recommitting the same test as an .ll file instead.

Added:
    llvm/trunk/test/CodeGen/SystemZ/fp-conv-18.ll
Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=354160&r1=354159&r2=354160&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Fri Feb 15 11:13:55 2019
@@ -5505,6 +5505,10 @@ SDValue SystemZTargetLowering::combineJO
 
 SDValue SystemZTargetLowering::combineFP_ROUND(
     SDNode *N, DAGCombinerInfo &DCI) const {
+
+  if (!Subtarget.hasVector())
+    return SDValue();
+
   // (fpround (extract_vector_elt X 0))
   // (fpround (extract_vector_elt X 1)) ->
   // (extract_vector_elt (VROUND X) 0)
@@ -5552,6 +5556,10 @@ SDValue SystemZTargetLowering::combineFP
 
 SDValue SystemZTargetLowering::combineFP_EXTEND(
     SDNode *N, DAGCombinerInfo &DCI) const {
+
+  if (!Subtarget.hasVector())
+    return SDValue();
+
   // (fpextend (extract_vector_elt X 0))
   // (fpextend (extract_vector_elt X 2)) ->
   // (extract_vector_elt (VEXTEND X) 0)

Added: llvm/trunk/test/CodeGen/SystemZ/fp-conv-18.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/fp-conv-18.ll?rev=354160&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-conv-18.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/fp-conv-18.ll Fri Feb 15 11:13:55 2019
@@ -0,0 +1,34 @@
+; Test that VEXTEND or VROUND nodes are not emitted without vector support.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+
+; CHECK-LABEL: fun1:
+; CHECK: ldeb
+; CHECK-LABEL: fun2:
+; CHECK: ledbr
+
+ at .str = external dso_local unnamed_addr constant [21 x i8], align 2
+
+define void @fun1() #0 {
+bb:
+%tmp = load <4 x float>, <4 x float>* undef, align 16
+%tmp1 = extractelement <4 x float> %tmp, i32 0
+%tmp2 = fpext float %tmp1 to double
+%tmp3 = extractelement <4 x float> %tmp, i32 2
+%tmp4 = fpext float %tmp3 to double
+tail call void (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), double %tmp2, double undef, double %tmp4, double undef)
+ret void
+}
+
+define void @fun2() #0 {
+bb:
+%tmp = load <2 x double>, <2 x double>* undef, align 16
+%tmp1 = extractelement <2 x double> %tmp, i32 0
+%tmp2 = fptrunc double %tmp1 to float
+%tmp3 = extractelement <2 x double> %tmp, i32 1
+%tmp4 = fptrunc double %tmp3 to float
+tail call void (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), float %tmp2, float undef, float %tmp4, float undef)
+ret void
+}
+
+declare dso_local void @printf(i8*, ...) #0