[PATCH] D58238: [DebugInfo] MachineSink: Insert undef DBG_VALUEs when sinking instructions, try to forward copies
Jeremy Morse via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 14 07:56:56 PST 2019
jmorse created this revision.
jmorse added reviewers: aprantl, bjope, vsk.
Herald added subscribers: llvm-commits, jdoerfert.
Herald added a project: LLVM.
jmorse added a parent revision: D58191: [DebugInfo] Make postra sinking of DBG_VALUEs safe in the presence of subregisters.
When we sink DBG_VALUEs at the moment, we simply move the DBG_VALUE instruction to below the sunk instruction. However, we should also mark the variable as being undef at the source location, to terminate any earlier variable location. This patch does that -- plus, if the instruction being sunk is a copy, it attempts to propagate the copy through the DBG_VALUE, replacing the destination with the source.
To avoid any kind of subregister shennanigans, vreg copy propagation only happens if all the subregisters agree; for physical registers we only propagate if the DBG_VALUE operand is the same as the destination of the copy. So:
%1 = COPY %0
DBG_VALUE %1
Would copy-prop, while
%1 = COPY %0
DBG_VALUE %1.subreg_8bit
Would not. Additional analysis might determine this to be safe, but I haven't implemented it here.
Likewise after regalloc:
$eax = COPY $ecx
DBG_VALUE $eax
Would constant-prop, while
$ax = $cx
DBG_VALUE $eax
Would not.
With this patch, building clang-3.4 yields a fractional number more number of covered variables, and roughly 0.5% more scope-bytes coverage.
Repository:
rL LLVM
https://reviews.llvm.org/D58238
Files:
lib/CodeGen/MachineSink.cpp
test/DebugInfo/MIR/X86/postra-subreg-sink.mir
test/DebugInfo/MIR/X86/sink-leaves-undef.mir
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