[PATCH] D58220: [AMDGPU] Ressociate 'add (add x, y), z' to use SALU
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 13 17:45:33 PST 2019
rampitec marked an inline comment as done.
rampitec added inline comments.
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:8547
+ SDValue Add1 = DAG.getNode(ISD::ADD, N, VT, Op0, Op1);
+ return DAG.getNode(ISD::ADD, N, VT, Add1, Op2, N->getFlags());
+ }
----------------
arsenm wrote:
> Is preserving the flags really correct? ReassociateOps seems to not do it
I think the final add has the same behavior as initial. Otherwise how could analysis tell us it was something like nuw or nsw in a first place?
But if you think this is questionable I can remove it. We do not use these flags in case of full dword adds anyway.
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https://reviews.llvm.org/D58220/new/
https://reviews.llvm.org/D58220
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