[PATCH] D58220: [AMDGPU] Ressociate 'add (add x, y), z' to use SALU

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:8547
+          SDValue Add1 = DAG.getNode(ISD::ADD, N, VT, Op0, Op1);
+          return DAG.getNode(ISD::ADD, N, VT, Add1, Op2, N->getFlags());
+        }
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Is preserving the flags really correct? ReassociateOps seems to not do it


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Comment at: test/CodeGen/AMDGPU/reassoc-scalar.ll:1
+; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+
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Should have a gfx9 run line also because of add3


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58220/new/

https://reviews.llvm.org/D58220