[PATCH] D58197: [x86] vectorize more cast ops in lowering to avoid register file transfers

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/X86/known-signbits-vector.ll:79
 ; X64-NEXT:    shrq $32, %rax
 ; X64-NEXT:    vcvtsi2ssl %eax, %xmm1, %xmm0
 ; X64-NEXT:    retq
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Any idea why this still fails?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58197/new/

https://reviews.llvm.org/D58197