[PATCH] D57947: GlobalISel: Add G_FCANONICALIZE instruction

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked an inline comment as done.
arsenm added inline comments.


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Comment at: test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir:61
+    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+    ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
+    ; SI: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[FPEXT]]
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aditya_nandakumar wrote:
> It's a bit weird mixing integer truncates with FPExts, but as this is just a test, it probably can't hurt.
This is correct, the ABI is passing half as the low 16 bits of a 32-bit register


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  https://reviews.llvm.org/D57947/new/

https://reviews.llvm.org/D57947