[PATCH] D57703: [AMDGPU] Consider XOR in waterfall loop as a terminator

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: test/CodeGen/AMDGPU/indirect-addressing-term.ll:11-12
+; GCN-LABEL: extract_w_offset_vgpr:
+; GCN: s_xor_b64 exec, exec,
+; GCN-NEXT: s_cbranch_execnz
+define amdgpu_kernel void @extract_w_offset_vgpr(i32 addrspace(1)* %out) {
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If you're not going to go for the MIR test, this should explicitly check for the existence of the spill code before the terminator


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57703/new/

https://reviews.llvm.org/D57703