[PATCH] D57416: [AMDGPU] Support emitting GOT relocations for function calls
Scott Linder via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 29 15:09:05 PST 2019
scott.linder added inline comments.
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3488-3492
+ if (DefI->getOpcode() == AMDGPU::S_LOAD_DWORDX2_IMM) {
+ AddrReg = DefI->getOperand(1).getReg();
+ DefI = MRI.getVRegDef(AddrReg);
+ }
+ assert(DefI->getOpcode() == AMDGPU::SI_PC_ADD_REL_OFFSET);
----------------
arsenm wrote:
> Looking for a specific load opcode looks concerning. Where is this coming from? I would think we need a pseudo at this point
SITargetLowering::LowerGlobalAddress adds the load after creating the SI_PC_ADD_REL_OFFSET pseudo. Would it be better to add a new pseudo for just the load, or create a pseudo to include the existing PC relative calculation and the load, i.e. SI_LOAD_PC_ADD_REL_OFFSET? I don't think the load needs to be bundled to enforce an ordering or anything.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57416/new/
https://reviews.llvm.org/D57416
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