[PATCH] D57314: [PowerPC] more opportunity for converting reg+reg to reg+imm
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 27 20:08:29 PST 2019
shchenz created this revision.
shchenz added reviewers: qshanz, nemanjai, jsji, hfinkel.
Herald added a subscriber: hiraditya.
PowerPC should convert following reg+reg to reg+imm.
body: |
bb.0.entry:
liveins: $x3, $f1, $x5
$x3 = ADDI8 $x5, 100
STFSX killed $f1, $zero8, $x3
STD killed $x3, killed $x5, 100
BLR8 implicit $lr8, implicit $rm
Fix the bug to make it work.
https://reviews.llvm.org/D57314
Files:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instr-add.mir
Index: llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instr-add.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instr-add.mir
@@ -0,0 +1,16 @@
+# RUN: llc -mtriple=powerpc64le--linux-gnu -stop-after ppc-pre-emit-peephole %s -o - -verify-machineinstrs | FileCheck %s
+
+---
+name: testFwdOperandKilledAfter
+# CHECK: name: testFwdOperandKilledAfter
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x3, $f1, $x5
+ $x3 = ADDI8 $x5, 100
+ STFSX killed $f1, $zero8, $x3
+ ; CHECK: STFS killed $f1, 100, $x5
+ STD killed $x3, killed $x5, 100
+ ; CHECK: STD killed $x3, killed $x5, 100
+ BLR8 implicit $lr8, implicit $rm
+...
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -3207,7 +3207,7 @@
// If DefMI also uses the register to be forwarded, we can only forward it
// if DefMI is being erased.
- if (DefMI.readsRegister(Reg, &getRegisterInfo()))
+ if (DefMI.modifiesRegister(Reg, &getRegisterInfo()))
return KillDefMI;
return true;
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