[llvm] r352340 - [AArch64][GlobalISel] Teach RBS about G_FNEG default mapping.

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Sun Jan 27 19:21:14 2019
New Revision: 352340

URL: http://llvm.org/viewvc/llvm-project?rev=352340&view=rev
Log:
[AArch64][GlobalISel] Teach RBS about G_FNEG default mapping.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir

Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp?rev=352340&r1=352339&r2=352340&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp Sun Jan 27 19:21:14 2019
@@ -392,6 +392,7 @@ static bool isPreISelGenericFloatingPoin
   case TargetOpcode::G_FPEXT:
   case TargetOpcode::G_FPTRUNC:
   case TargetOpcode::G_FCEIL:
+  case TargetOpcode::G_FNEG:
     return true;
   }
   return false;

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir?rev=352340&r1=352339&r2=352340&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir Sun Jan 27 19:21:14 2019
@@ -59,6 +59,7 @@
   define void @test_fptrunc_s32_s64() { ret void }
 
   define void @test_fconstant_s32() { ret void }
+  define void @test_fneg_s32() { ret void }
 
   define void @test_fcmp_s32() { ret void }
 
@@ -679,6 +680,19 @@ body: |
 ...
 
 ---
+name:            test_fneg_s32
+legalized:       true
+body: |
+  bb.0:
+  liveins: $s0
+    ; CHECK-LABEL: name: test_fneg_s32
+    ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0
+    ; CHECK: [[FNEG:%[0-9]+]]:fpr(s32) = G_FNEG [[COPY]]
+    %0:_(s32) = COPY $s0
+    %1:_(s32) = G_FNEG %0(s32)
+...
+
+---
 name:            test_fcmp_s32
 legalized:       true
 registers: