[PATCH] D57096: [RISCV] Custom-legalise i32 SDIV/UDIV/UREM on RV64M

[Alex Bradbury via Phabricator via llvm-commits]

asb updated this revision to Diff 183255.
asb marked an inline comment as done.
asb added a comment.

Update to implement ComputeNumSignBitsForTargetNode, simplifying the patterns in RISCVInstrInfoM.td. Thanks for the review feedback.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57096/new/

https://reviews.llvm.org/D57096

Files:
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfoM.td
  test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll

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