[PATCH] D57056: [MC][X86] Correctly model additional operand latency caused by transfer delays from the integer to the floating point unit.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 23 16:59:23 PST 2019


craig.topper added a comment.

In D57056#1366590 <https://reviews.llvm.org/D57056#1366590>, @RKSimon wrote:

> @craig.topper Should any Intel model account for this in a similar way? Agner is a little vague on this.


I tried to find out more about this internally. There are still bypass delays between integer and fp in some cases, and they change in every generation. And the definition of what's a float and what's an integer have changed over time. For example logic ops and shuffles aren't really considered int or fp in the most recent CPUs.


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https://reviews.llvm.org/D57056





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