[PATCH] D57008: [AMDGPU] With XNACK, cannot clause a load with result coalesced with operand
Tim Renouf via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 22 00:40:16 PST 2019
tpr marked 4 inline comments as done.
tpr added inline comments.
================
Comment at: lib/Target/AMDGPU/SIFormMemoryClauses.cpp:126
+ unsigned ResReg = ResMO.getReg();
+ for (const MachineOperand &MO : MI.operands()) {
+ if (!MO.isReg() || MO.isDef())
----------------
rampitec wrote:
> MI.uses() maybe? Then you do not need to check for isDef() and have less to scan.
Good idea to use MI.uses(), but it looks like I still need to check isDef() according to the comment in MachineInstr.h:
/// Returns a range that includes all operands that are register uses.
/// This may include unrelated operands which are not register uses.
So I guess it might include implicit defs at the end or something.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57008/new/
https://reviews.llvm.org/D57008
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