[PATCH] D57008: [AMDGPU] With XNACK, cannot clause a load with result coalesced with operand
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 21 10:09:10 PST 2019
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/SIFormMemoryClauses.cpp:123
+ // If this is a load instruction where the result has been coalesced with an operand, then we cannot clause it.
+ const MachineOperand &ResMO = MI.getOperand(0);
+ if (ResMO.isReg() && ResMO.isDef()) {
----------------
This assumes the instruction has any operands
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57008/new/
https://reviews.llvm.org/D57008
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