[PATCH] D56845: [AMDGPU] Add some missing always-uniform values.
Neil Henning via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 17 08:18:47 PST 2019
sheredom updated this revision to Diff 182296.
sheredom added a comment.
Also tag s.getpc as scalar, and add tests in the Analysis folder like suggested.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56845/new/
https://reviews.llvm.org/D56845
Files:
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll
Index: test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll
===================================================================
--- test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll
+++ test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll
@@ -1,6 +1,7 @@
; RUN: opt -mtriple amdgcn-unknown-amdhsa -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
-define amdgpu_kernel void @workitem_id_x() #1 {
+; CHECK: for function 'workitem_id_x':
+define amdgpu_kernel void @workitem_id_x() {
%id.x = call i32 @llvm.amdgcn.workitem.id.x()
; CHECK: DIVERGENT: %id.x = call i32 @llvm.amdgcn.workitem.id.x()
%first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)
@@ -8,7 +9,42 @@
ret void
}
+; CHECK: for function 'icmp':
+define amdgpu_kernel void @icmp(i32 inreg %x) {
+; CHECK-NOT: DIVERGENT: %icmp = call i64 @llvm.amdgcn.icmp.i32
+ %icmp = call i64 @llvm.amdgcn.icmp.i32(i32 %x, i32 0, i32 33)
+ ret void
+}
+
+; CHECK: for function 'fcmp':
+define amdgpu_kernel void @fcmp(float inreg %x, float inreg %y) {
+; CHECK-NOT: DIVERGENT: %fcmp = call i64 @llvm.amdgcn.fcmp.i32
+ %fcmp = call i64 @llvm.amdgcn.fcmp.i32(float %x, float %y, i32 33)
+ ret void
+}
+
+; CHECK: for function 's_buffer_load':
+define amdgpu_kernel void @s_buffer_load(<4 x i32> inreg %desc) {
+; CHECK-NOT: DIVERGENT: %load = call <2 x i32> @llvm.amdgcn.s.buffer.load.v2i32
+ %load = call <2 x i32> @llvm.amdgcn.s.buffer.load.v2i32(<4 x i32> %desc, i32 0, i32 0)
+ ret void
+}
+
+; CHECK: for function 's_getpc':
+define amdgpu_kernel void @s_getpc(<4 x i32> inreg %desc) {
+; CHECK-NOT: DIVERGENT: %load = call i64 @llvm.amdgcn.s.getpc
+ %load = call i64 @llvm.amdgcn.s.getpc()
+ ret void
+}
+
declare i32 @llvm.amdgcn.workitem.id.x() #0
declare i32 @llvm.amdgcn.readfirstlane(i32) #0
+declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #1
+declare i64 @llvm.amdgcn.fcmp.i32(float, float, i32) #1
+declare <2 x i32> @llvm.amdgcn.s.buffer.load.v2i32(<4 x i32>, i32, i32) #2
+declare i64 @llvm.amdgcn.s.getpc() #3
attributes #0 = { nounwind readnone }
+attributes #1 = { nounwind readnone convergent }
+attributes #2 = { nounwind readonly convergent }
+attributes #3 = { nounwind readnone speculatable }
Index: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -579,6 +579,10 @@
return false;
case Intrinsic::amdgcn_readfirstlane:
case Intrinsic::amdgcn_readlane:
+ case Intrinsic::amdgcn_icmp:
+ case Intrinsic::amdgcn_fcmp:
+ case Intrinsic::amdgcn_s_buffer_load:
+ case Intrinsic::amdgcn_s_getpc:
return true;
}
}
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