[PATCH] D56695: [X86] Add X86ISD::VSHLV and X86ISD::VSRLV nodes for psllv and psrlv

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86InstrAVX512.td:6517
+defm : avx512_var_shift_int_lowering_mb<"VPSLLVQ", X86vshlv, v4i64x_info, [HasVLX]>;
+defm : avx512_var_shift_int_lowering_mb<"VPSLLVQ", X86vshlv, v8i64_info, [HasAVX512]>;
 
----------------
zhutianyang wrote:
> RKSimon wrote:
> > Duplication - wrap in defm macro?
> Could you share a demo to explain how to wrap it? thanks
Something like (sorry not fully tested):
```
multiclass avx512_var_shift_int<string InstrStr, SDNode OpNode> {
  defm : avx512_var_shift_int_lowering<InstrStr#"W", OpNode, v8i16x_info, [HasVLX, HasBWI]>;
  defm : avx512_var_shift_int_lowering<InstrStr#"W", OpNode, v16i16x_info, [HasVLX, HasBWI]>;
  defm : avx512_var_shift_int_lowering<InstrStr#"W", OpNode, v32i16_info, [HasBWI]>;
  defm : avx512_var_shift_int_lowering_mb<InstrStr#"D", OpNode, v4i32x_info, [HasVLX]>;
  defm : avx512_var_shift_int_lowering_mb<InstrStr#"D", OpNode, v8i32x_info, [HasVLX]>;
  defm : avx512_var_shift_int_lowering_mb<InstrStr#"D", OpNode, v16i32_info, [HasAVX512]>;
  defm : avx512_var_shift_int_lowering_mb<InstrStr#"Q", OpNode, v2i64x_info, [HasVLX]>;
  defm : avx512_var_shift_int_lowering_mb<InstrStr#"Q", OpNode, v4i64x_info, [HasVLX]>;
  defm : avx512_var_shift_int_lowering_mb<InstrStr#"Q", OpNode, v8i64_info, [HasAVX512]>;
}
defm : avx512_var_shift_int<"VPSRAV", X86vsrav>;
```


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  rL LLVM

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https://reviews.llvm.org/D56695