[PATCH] D56617: [X86] Avoid clobbering ESP/RSP in the epilogue.

[Reid Kleckner via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL351146: [X86] Avoid clobbering ESP/RSP in the epilogue. (authored by rnk, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D56617?vs=181349&id=181681#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56617/new/

https://reviews.llvm.org/D56617

Files:
  llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
  llvm/trunk/test/CodeGen/X86/pr40289-64bit.ll
  llvm/trunk/test/CodeGen/X86/pr40289.ll


Index: llvm/trunk/test/CodeGen/X86/pr40289.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/pr40289.ll
+++ llvm/trunk/test/CodeGen/X86/pr40289.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=i686-pc-windows-msvc | FileCheck %s
+
+define < 3 x i32 > @clobber() {
+  %1 = alloca i32
+  %2 = load volatile i32, i32* %1
+  ret < 3 x i32 > undef
+  ; CHECK-LABEL: clobber:
+  ; CHECK-NOT: popl %esp
+  ; CHECK: addl $4, %esp
+}
Index: llvm/trunk/test/CodeGen/X86/pr40289-64bit.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/pr40289-64bit.ll
+++ llvm/trunk/test/CodeGen/X86/pr40289-64bit.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
+
+define cc 92 < 9 x i64 > @clobber() {
+  %1 = alloca i64
+  %2 = load volatile i64, i64* %1
+  ret < 9 x i64 > undef
+  ; CHECK-LABEL: clobber:
+  ; CHECK-NOT: popq %rsp
+  ; CHECK: addq $8, %rsp
+}
Index: llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
@@ -185,7 +185,8 @@
     }
 
     for (auto CS : AvailableRegs)
-      if (!Uses.count(CS) && CS != X86::RIP)
+      if (!Uses.count(CS) && CS != X86::RIP && CS != X86::RSP &&
+          CS != X86::ESP)
         return CS;
   }
   }


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