[PATCH] D56281: [DAGCombiner] reduce buildvec of zexted extracted element to shuffle

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 181103.
spatel added a comment.

Patch updated:
I reduced the reach of this patch to only handle a build vector of undefs + 1-non-undef. If x86 isn't lowering the other cases optimally, then other targets may not be either even if there's no regression test evidence of that.

So now, these should be mostly clear wins. Not sure about some of the SSE2-only shuffling.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56281/new/

https://reviews.llvm.org/D56281

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/buildvec-extract.ll

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