[PATCH] D56082: [X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (add, sub)

[Anton Afanasyev via Phabricator via llvm-commits]

anton-afanasyev added a comment.

In D56082#1340950 <https://reviews.llvm.org/D56082#1340950>, @ABataev wrote:

> Thenit is better to introduce another function in TTI - something like `getMinVectOpWidth()` and use it in SLP vectorizer at least rather than iadding sometthing like semi vector size.


Thanks for your note! This requires TTI API changing as well but may be more flexible (one can change `getMinVecOpWidth()` to 1/4 of `MinVectorRegisterBitWidth`, for instance). Though it leads to less clear root cause of where this semi vectors come from (from special horizontal operations).

I'm to change this patch appropriately. I'm also to check what are the consequences of merging `MinVecOpWidth` and `MinVectorRegisterBitWidth`.


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