[PATCH] D55870: [X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post processing

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 18 17:15:08 PST 2018


craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, andreadb.

The (cmp (and X, Y) 0) pattern is greedy and ends up forming a TESTrr and consuming the and when it might be better to use one of the BMI/TBM like BLSR or BLSI.

This patch moves removes the pattern from isel and adds a post processing check to combine TESTrr+ANDrr into just a TESTrr. With this patch we are able to select the BMI/TBM instructions, but we'll also emit a TESTrr when the result is compared to 0. In many cases the peephole pass will be able to use optimizeCompareInstr to remove the TEST, but its probably not perfect.


https://reviews.llvm.org/D55870

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86InstrArithmetic.td
  test/CodeGen/X86/bmi.ll
  test/CodeGen/X86/tbm_patterns.ll

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