[PATCH] D55448: [DAGCombiner] allow hoisting vector bitwise logic ahead of truncates

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 13 13:56:54 PST 2018

Previous message: [llvm] r349088 - [SampleFDO] handle ProfileSampleAccurate when initializing function entry count
Next message: [PATCH] D55448: [DAGCombiner] allow hoisting vector bitwise logic ahead of truncates
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

RKSimon added a comment.

There's been some churn on many of these test files recently - rebase?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55448/new/

https://reviews.llvm.org/D55448

Previous message: [llvm] r349088 - [SampleFDO] handle ProfileSampleAccurate when initializing function entry count
Next message: [PATCH] D55448: [DAGCombiner] allow hoisting vector bitwise logic ahead of truncates
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list