[PATCH] D53275: [Power9] Exploit power9 new instruction setb
Jinsong Ji via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 13 10:39:46 PST 2018
jsji added a comment.
Mostly good to me except some minor changes. @nemanjai Do you have any further comments regarding @jedilyn 's latest update? Thanks.
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Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4710
+ std::swap(LHS, RHS);
+ // Specify setgt here to avoid possible seteq optimization in SelectCC
+ SDValue GenCC =
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Can we explain more why we need to avoid seteq optimization in SelectCC?
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Comment at: llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
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Please add new testcase in a NFC patch before this, and only show different due to this opt here. Thanks.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D53275/new/
https://reviews.llvm.org/D53275
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