[PATCH] D55558: [TargetLowering] Add ISD::AND handling to SimplifyDemandedVectorElts

[Simon Pilgrim via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL348926: [TargetLowering] Add ISD::AND handling to SimplifyDemandedVectorElts (authored by RKSimon, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D55558?vs=177707&id=177844#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55558/new/

https://reviews.llvm.org/D55558

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/trunk/test/CodeGen/SystemZ/vec-trunc-to-i1.ll
  llvm/trunk/test/CodeGen/X86/copysign-constant-magnitude.ll
  llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
  llvm/trunk/test/CodeGen/X86/known-signbits-vector.ll
  llvm/trunk/test/CodeGen/X86/vector-shift-lshr-sub128.ll
  llvm/trunk/test/CodeGen/X86/vector-shift-shl-sub128.ll

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