[PATCH] D55402: [AMDGPU] Simplify negated condition
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 11 13:10:27 PST 2018
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:1617
+ if (!LIS->hasInterval(Reg))
+ return nullptr;
+ LiveInterval &LI = LIS->getInterval(Reg);
----------------
Isn’t there a get cached interval or is that only for regunits?
================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:1641
+ if (!DefIdx.isValid() ||
+ MDT.dominates(LIS->getInstructionFromIndex(DefIdx),
+ LIS->getInstructionFromIndex(V->def)))
----------------
Do you actually need the dominate check? Don’t you implicitly do that when comparing the value numbers?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D55402/new/
https://reviews.llvm.org/D55402
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