[PATCH] D55301: RegAlloc: Allow targets to split register allocation

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:75
+                              const TargetRegisterClass &RC) {
+  return static_cast<const SIRegisterInfo &>(TRI).hasVGPRs(&RC);
+}
----------------
!isSGPRClass() to catch [potentially] remaining strange register classes.


================
Comment at: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:1064
+
+  addPreRewrite();
+
----------------
You need to pass filter to PreRewrite as well.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55301/new/

https://reviews.llvm.org/D55301