[PATCH] D55241: AMDGPU: Should always start from the first register in VGPR indexing.

[Changpeng Fang via Phabricator via llvm-commits]

cfang added a comment.

In D55241#1317688 <https://reviews.llvm.org/D55241#1317688>, @arsenm wrote:

> In D55241#1317631 <https://reviews.llvm.org/D55241#1317631>, @cfang wrote:
>
> > In D55241#1317630 <https://reviews.llvm.org/D55241#1317630>, @arsenm wrote:
> >
> > > We should try to use some known bits information to keep this. I have a patch to add a machine version, but there might be a better way
> >
> >
> > Would you please explain how would your knownbit approach resolve the negative index issue while keep the optimization for gfx9+?
> >  Or just post your patch. Thanks.
>
>
> If you know the base index isn't negative, you don't need to disable this


Theoretically it is correct. But in the real world applications, the index should be unknown to the compiler, and most  likely a variable.
Also, as the offset is a positive number and we choose to start from offset to indirect vgpr indexing, we are sure the index is negative if we are addressing 
the registers left to "offset" in the vector.

I am thinking that in very rare case that the compiler can make sure that the  base index is non-negative, and doubt whether it is 
worthwhile to do the optimization to save one (ADD) instruction for such case.


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https://reviews.llvm.org/D55241