[PATCH] D54143: [WIP, RISCV] Generate address sequences suitable for mcmodel=medium
James Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 4 18:58:23 PST 2018
jrtc27 added a comment.
In D54143#1319527 <https://reviews.llvm.org/D54143#1319527>, @lewis-revill wrote:
> Rebased on top of master, and added entry to `getInstSizeInBits` for `PseudoAddrPCRel`.
[You mean `getInstSizeInBytes`]
@asb: We run the `BranchRelaxation` pass *before* `RISCVExpandPseudos` (`addPreEmitPass` vs `addPreEmitPass2`), but the atomics pseudos don't have a size set, nor are they special-cased in `getInstSizeInBytes`, so will `BranchRelaxtion` not think they are 0 bytes? Can we just run `BranchRelaxation` later, or do we need to declare the right size for everything (ugh)?
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https://reviews.llvm.org/D54143/new/
https://reviews.llvm.org/D54143
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