[PATCH] D55058: AMDGPU: Add patterns for v4i16/v4f16 -> v4i16/v4f16 bitcasts

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll:4
+; CHECK: s_waitcnt
+define <4 x i16> @test(<4 x i32> inreg) #0 {
+  %a = call <4 x half> @llvm.amdgcn.buffer.load.v4f16(<4 x i32> %0, i32 0, i32 0, i1 0, i1 0)
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probably should use amdgpu_ps to avoid the waterfall


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Comment at: test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll:9
+}
+
+declare <4 x half> @llvm.amdgcn.buffer.load.v4f16(<4 x i32>, i32, i32, i1, i1) #0
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Can you add the inverse too?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55058/new/

https://reviews.llvm.org/D55058