[PATCH] D54882: [AMDGPU] Add sdwa support for ADD|SUB U64 decomposed Pseudos
Ron Lieberman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 30 18:01:18 PST 2018
ronlieb marked an inline comment as done.
ronlieb added inline comments.
================
Comment at: test/CodeGen/AMDGPU/sdwa-ops.mir:354
+ %63:vgpr_32, %65:sreg_64_xexec = V_ADD_I32_e64 %30.sub0, %23, implicit $exec
+ %31:vreg_64 = COPY $vcc_hi
+ %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, implicit $exec
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rampitec wrote:
> I wander why verifier does not complain on this instruction. Ah, I see. Please add -verify-machineinstrs to run lines.
>
> Anyway, you need a test for what you are checking in the code: vcc def in between of two instructions.
good catch: adding -verify-machineinstrs
see line 364 , this has a def of $vcc between the ADD and ADDC, is that what you are suggesting.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D54882/new/
https://reviews.llvm.org/D54882
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