[PATCH] D54882: [AMDGPU] Add sdwa support for ADD|SUB U64 decomposed Pseudos

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SIPeepholeSDWA.cpp:914
+  // Check if VCC is referenced in range of MI and MISucc.
+  for (MachineBasicBlock::const_iterator I = MI, E = MISucc; I != E; ++I) {
+    if (I->modifiesRegister(AMDGPU::VCC, TRI))
----------------
Almost there. I = std::next(MI) and you do not need E, it is confusing.


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Comment at: test/CodeGen/AMDGPU/sdwa-ops.mir:354
+    %63:vgpr_32, %65:sreg_64_xexec = V_ADD_I32_e64 %30.sub0, %23, implicit $exec
+    %31:vreg_64 = COPY $vcc_hi
+    %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, implicit $exec
----------------
I wander why verifier does not complain on this instruction. Ah, I see. Please add -verify-machineinstrs to run lines.

Anyway, you need a test for what you are checking in the code: vcc def in between of two instructions.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54882/new/

https://reviews.llvm.org/D54882