[llvm] r347722 - [X86] Add test cases to show that we don't properly take -mprefer-vector-width=256 and -min-legal-vector-width=256 into account when costing sext/zext.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 27 16:33:35 PST 2018
Author: ctopper
Date: Tue Nov 27 16:33:34 2018
New Revision: 347722
URL: http://llvm.org/viewvc/llvm-project?rev=347722&view=rev
Log:
[X86] Add test cases to show that we don't properly take -mprefer-vector-width=256 and -min-legal-vector-width=256 into account when costing sext/zext.
The check lines marked AVX256 in the zext256/sext256 functions should be closer to the AVX values which would take into account a splitting cost.
Added:
llvm/trunk/test/Analysis/CostModel/X86/min-legal-vector-width.ll
Added: llvm/trunk/test/Analysis/CostModel/X86/min-legal-vector-width.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/X86/min-legal-vector-width.ll?rev=347722&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/X86/min-legal-vector-width.ll (added)
+++ llvm/trunk/test/Analysis/CostModel/X86/min-legal-vector-width.ll Tue Nov 27 16:33:34 2018
@@ -0,0 +1,144 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,VEC256,AVX
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512vl,+avx512bw,+avx512dq,+prefer-256-bit | FileCheck %s --check-prefixes=CHECK,VEC256,SKX256
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512vl,+avx512bw,+avx512dq,-prefer-256-bit | FileCheck %s --check-prefixes=CHECK,VEC512
+
+define void @zext256() "min-legal-vector-width"="256" {
+; AVX-LABEL: 'zext256'
+; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %A = zext <8 x i16> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %B = zext <8 x i32> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %C = zext <16 x i8> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %D = zext <16 x i16> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %E = zext <32 x i8> undef to <32 x i16>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; SKX256-LABEL: 'zext256'
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %A = zext <8 x i16> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = zext <8 x i32> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = zext <16 x i8> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = zext <16 x i16> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %E = zext <32 x i8> undef to <32 x i16>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; VEC512-LABEL: 'zext256'
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %A = zext <8 x i16> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = zext <8 x i32> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = zext <16 x i8> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = zext <16 x i16> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %E = zext <32 x i8> undef to <32 x i16>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %A = zext <8 x i16> undef to <8 x i64>
+ %B = zext <8 x i32> undef to <8 x i64>
+ %C = zext <16 x i8> undef to <16 x i32>
+ %D = zext <16 x i16> undef to <16 x i32>
+ %E = zext <32 x i8> undef to <32 x i16>
+ ret void
+}
+
+define void @zext512() "min-legal-vector-width"="512" {
+; AVX-LABEL: 'zext512'
+; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %A = zext <8 x i16> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %B = zext <8 x i32> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %C = zext <16 x i8> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %D = zext <16 x i16> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %E = zext <32 x i8> undef to <32 x i16>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; SKX256-LABEL: 'zext512'
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %A = zext <8 x i16> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = zext <8 x i32> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = zext <16 x i8> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = zext <16 x i16> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %E = zext <32 x i8> undef to <32 x i16>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; VEC512-LABEL: 'zext512'
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %A = zext <8 x i16> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = zext <8 x i32> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = zext <16 x i8> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = zext <16 x i16> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %E = zext <32 x i8> undef to <32 x i16>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %A = zext <8 x i16> undef to <8 x i64>
+ %B = zext <8 x i32> undef to <8 x i64>
+ %C = zext <16 x i8> undef to <16 x i32>
+ %D = zext <16 x i16> undef to <16 x i32>
+ %E = zext <32 x i8> undef to <32 x i16>
+ ret void
+}
+
+define void @sext256() "min-legal-vector-width"="256" {
+; AVX-LABEL: 'sext256'
+; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %A = sext <8 x i8> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %B = sext <8 x i16> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %C = sext <8 x i32> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %D = sext <16 x i8> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %E = sext <16 x i16> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F = sext <32 x i8> undef to <32 x i16>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; SKX256-LABEL: 'sext256'
+; SKX256-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %A = sext <8 x i8> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = sext <8 x i16> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = sext <8 x i32> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = sext <16 x i8> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %E = sext <16 x i16> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F = sext <32 x i8> undef to <32 x i16>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; VEC512-LABEL: 'sext256'
+; VEC512-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %A = sext <8 x i8> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = sext <8 x i16> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = sext <8 x i32> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = sext <16 x i8> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %E = sext <16 x i16> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %F = sext <32 x i8> undef to <32 x i16>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %A = sext <8 x i8> undef to <8 x i64>
+ %B = sext <8 x i16> undef to <8 x i64>
+ %C = sext <8 x i32> undef to <8 x i64>
+ %D = sext <16 x i8> undef to <16 x i32>
+ %E = sext <16 x i16> undef to <16 x i32>
+ %F = sext <32 x i8> undef to <32 x i16>
+ ret void
+}
+
+define void @sext512() "min-legal-vector-width"="512" {
+; AVX-LABEL: 'sext512'
+; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %A = sext <8 x i8> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %B = sext <8 x i16> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %C = sext <8 x i32> undef to <8 x i64>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %D = sext <16 x i8> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %E = sext <16 x i16> undef to <16 x i32>
+; AVX-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F = sext <32 x i8> undef to <32 x i16>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; SKX256-LABEL: 'sext512'
+; SKX256-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %A = sext <8 x i8> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = sext <8 x i16> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = sext <8 x i32> undef to <8 x i64>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = sext <16 x i8> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %E = sext <16 x i16> undef to <16 x i32>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %F = sext <32 x i8> undef to <32 x i16>
+; SKX256-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+; VEC512-LABEL: 'sext512'
+; VEC512-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %A = sext <8 x i8> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %B = sext <8 x i16> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %C = sext <8 x i32> undef to <8 x i64>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %D = sext <16 x i8> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %E = sext <16 x i16> undef to <16 x i32>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %F = sext <32 x i8> undef to <32 x i16>
+; VEC512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+ %A = sext <8 x i8> undef to <8 x i64>
+ %B = sext <8 x i16> undef to <8 x i64>
+ %C = sext <8 x i32> undef to <8 x i64>
+ %D = sext <16 x i8> undef to <16 x i32>
+ %E = sext <16 x i16> undef to <16 x i32>
+ %F = sext <32 x i8> undef to <32 x i16>
+ ret void
+}
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