[PATCH] D54016: [X86] don't allow X86_64 PIC mode addresses to be used as immediates

Reid Kleckner via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 27 11:10:15 PST 2018


rnk requested changes to this revision.
rnk added a comment.
This revision now requires changes to proceed.

I don't think this is the correct fix, and it would need a test.

This is the code in question:

  #include <stdio.h>
  int offset = 0;
  static void foo2() { printf("foo2 is called\n"); }
  void foo() {
    __asm__ volatile("movq %0,%%gs:(%1)" : : "ir"((void *)&foo2), "r"(offset));
    printf("foo is called\n");
  }

Between the two alternative constraints, `i` and `r`, LLVM chooses `i`, which, if you don't look inside the assembly, seems reasonable. Then you end up generating, essentially, "MOV 64-bit immediate to GS offset 0".

I think the correct fix is probably somewhere in the inline assembly specific codepath, not this highly general one. We absolutely want to fold displacements into RIP relative address modes.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54016/new/

https://reviews.llvm.org/D54016





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