[PATCH] D54957: [llvm-mca][MC] Add the ability to declare which processor resources model load/store queues (PR36666).

[Matt Davis via Phabricator via llvm-commits]

mattd added inline comments.


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Comment at: tools/llvm-mca/include/HardwareUnits/LSUnit.h:120
+  // However, field `LoadLatency` is often based on the 'load-to-use' latency
+  // from L1D (as reported in the official hardware documentation), and it
+  // normally already accounts for the extra latency of due to the forwarding
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andreadb wrote:
> mattd wrote:
> > It feels weird to mention 'official hardware documentation' here, when the LSUnit should be somewhat target agnostic.  Perhaps clarify what hardware documentation you are referring to.
> No documentation in particular... Processor vendors often describe it in their official documents. Maybe it is my English... if it is confusing, I can remove it.
Ah, I see.  I read that statement as being specific to one vendor/implementation, and not something more general. 


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  https://reviews.llvm.org/D54957/new/

https://reviews.llvm.org/D54957