[PATCH] D54714: [AMDGPU] Add and update scalar instructions

[Graham Sellers via Phabricator via llvm-commits]

grahamsellers updated this revision to Diff 175455.
grahamsellers added a comment.

Using SReg_32_XM0 to allocate temporary scalars as requested.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54714/new/

https://reviews.llvm.org/D54714

Files:
  lib/Target/AMDGPU/AMDGPUInstructions.td
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SOPInstructions.td
  test/CodeGen/AMDGPU/andorn2.ll
  test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
  test/CodeGen/AMDGPU/fceil64.ll
  test/CodeGen/AMDGPU/ftrunc.f64.ll
  test/CodeGen/AMDGPU/insert_vector_elt.ll
  test/CodeGen/AMDGPU/nand.ll
  test/CodeGen/AMDGPU/nor.ll
  test/CodeGen/AMDGPU/xnor.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D54714.175455.patch
Type: text/x-patch
Size: 27900 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181127/88c70ef2/attachment.bin>