[PATCH] D54725: [SelectionDAG] Compute known bits and num sign bits for live out vector registers. Use it to add AssertZExt/AssertSExt in the live in basic blocks

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 19 17:54:30 PST 2018

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craig.topper added a comment.

This doesn't help PR11730 at all.


https://reviews.llvm.org/D54725

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