[PATCH] D54707: [X86][SSE] Remove unnecessary bit-and in pshufb vector ctlz (PR39703)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, andreadb.

SSE PSHUFB vector ctlz lowering works at the i4 nibble level. As detailed in PR39703, we were masking the lower nibble off but we only actually use it in the case where the upper nibble is known to be zero, making it safe to remove the mask and save an instruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D54707

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/combine-srl.ll
  test/CodeGen/X86/prefer-avx256-lzcnt.ll
  test/CodeGen/X86/vector-lzcnt-128.ll
  test/CodeGen/X86/vector-lzcnt-256.ll
  test/CodeGen/X86/vector-lzcnt-512.ll

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