[PATCH] D54042: [AMDGPU] Extend the SI Load/Store optimizer to combine more things.

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added inline comments.


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Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:83
+  S_BUFFER_LOAD_IMM,
+  BUFFER_LOAD_IDXEN,
+  BUFFER_LOAD_OFFEN,
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sheredom wrote:
> nhaehnle wrote:
> > Do those actually occur like this in practice?
> Do you mean do I see idxen loads in workloads? Yup!
Mergeable ones? What pattern in the high-level source does that correspond to?


https://reviews.llvm.org/D54042