[PATCH] D54073: [x86] allow vector load narrowing with multi-use values

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 8 09:15:26 PST 2018


craig.topper added inline comments.


================
Comment at: test/CodeGen/X86/avx512-extract-subvector-load-store.ll:1290
+; AVX512NOTDQ-NEXT:    movzbl 56(%rdi), %eax
+; AVX512NOTDQ-NEXT:    kmovd %eax, %k1
 ; AVX512NOTDQ-NEXT:    vpcmpeqd %ymm0, %ymm0, %ymm0
----------------
RKSimon wrote:
> @craig.topper Is this OK?
I think so. kshift is 3 cycles. kmovd is one cycle. So this is probably better unless we have some terrible crossing penalty.


https://reviews.llvm.org/D54073





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