[PATCH] D53222: AMDGPU: Add sram-ecc feature

[Tony Tye via Phabricator via llvm-commits]

t-tye added a comment.

Does the assembler need any support for this? For example, does the .amdgcn_target directive need to accept the +sramecc and ensure the e_flag is set accordingly?

Does scheduler need to check the setting for the instruction latency for 3 operand ALU that involve sub dword operands s a separate patch?


https://reviews.llvm.org/D53222