[PATCH] D53762: AMDGPU: Combine DPP mov with use instuctions (VOP1/2/3)
Valery Pykhtin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 2 07:31:23 PDT 2018
vpykhtin updated this revision to Diff 172353.
vpykhtin retitled this revision from "AMDGPU: Combine DPP mov with use instuctions" to "AMDGPU: Combine DPP mov with use instuctions (VOP1/2/3)".
vpykhtin edited the summary of this revision.
vpykhtin added a comment.
Fixed per review issues.
Added checks on non-default VOP3 modifiers with negative mir test on these. Src operand modifiers are checked to have only ABS or NEG (allowed by DPP) which effectively prevents other modifiers such non-default OpSel modifiers from being combined. OpSel tests aren't included as there're no opsel pseudos yet.
Repository:
rL LLVM
https://reviews.llvm.org/D53762
Files:
lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPU.td
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
lib/Target/AMDGPU/CMakeLists.txt
lib/Target/AMDGPU/GCNDPPCombine.cpp
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstrInfo.h
lib/Target/AMDGPU/SIInstrInfo.td
lib/Target/AMDGPU/VOP1Instructions.td
lib/Target/AMDGPU/VOP2Instructions.td
lib/Target/AMDGPU/VOPInstructions.td
test/CodeGen/AMDGPU/dpp_combine.ll
test/CodeGen/AMDGPU/dpp_combine_subregs.mir
test/MC/AMDGPU/vop_dpp.s
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