[PATCH] D54069: [X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:31857-31859
+      if (Opc == X86ISD::VSRAI &&
+          OriginalDemandedBits.countLeadingZeros() < ShAmt)
+        DemandedMask.setSignBit();
----------------
This could use a comment like the generic SRA:
      // If any of the demanded bits are produced by the sign extension, we also
      // demand the input sign bit.



Repository:
  rL LLVM

https://reviews.llvm.org/D54069