[PATCH] D54069: [X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.

This also enables some constant folding from KnownBits propagation. This helps on some cases vXi64 case in 32-bit mode where constant vectors appear as vXi32 and a bitcast. This can prevent getNode from constant folding sra/shl/srl.


Repository:
  rL LLVM

https://reviews.llvm.org/D54069

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/combine-srl.ll
  test/CodeGen/X86/combine-udiv.ll
  test/CodeGen/X86/known-signbits-vector.ll
  test/CodeGen/X86/pr35918.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shift-ashr-256.ll
  test/CodeGen/X86/vector-trunc-usat.ll

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