[llvm] r345875 - [GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElements

[Volkan Keles via llvm-commits]

Author: volkan
Date: Thu Nov  1 12:01:53 2018
New Revision: 345875

URL: http://llvm.org/viewvc/llvm-project?rev=345875&view=rev
Log:
[GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElements

Summary:
This function was causing a crash when `MaxElements == 1` because
it was trying to create a single element vector type.

Reviewers: dsanders, aemerson, aditya_nandakumar

Reviewed By: dsanders

Subscribers: rovka, kristof.beyls, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D53734

Added:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-fewerElts.mir
Removed:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir
Modified:
    llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
    llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h?rev=345875&r1=345874&r2=345875&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h Thu Nov  1 12:01:53 2018
@@ -693,6 +693,8 @@ public:
         },
         [=](const LegalityQuery &Query) {
           LLT VecTy = Query.Types[TypeIdx];
+          if (MaxElements == 1)
+            return std::make_pair(TypeIdx, VecTy.getElementType());
           return std::make_pair(
               TypeIdx, LLT::vector(MaxElements, VecTy.getScalarSizeInBits()));
         });

Modified: llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp?rev=345875&r1=345874&r2=345875&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp Thu Nov  1 12:01:53 2018
@@ -169,7 +169,8 @@ AArch64LegalizerInfo::AArch64LegalizerIn
       .lowerIf([=](const LegalityQuery &Query) {
         return Query.Types[0].getSizeInBits() != Query.MMODescrs[0].SizeInBits;
       })
-      .clampNumElements(0, v2s32, v2s32);
+      .clampNumElements(0, v2s32, v2s32)
+      .clampMaxNumElements(0, s64, 1);
 
   getActionDefinitionsBuilder(G_STORE)
       .legalForTypesWithMemSize({{s8, p0, 8},
@@ -187,7 +188,8 @@ AArch64LegalizerInfo::AArch64LegalizerIn
         return Query.Types[0].isScalar() &&
                Query.Types[0].getSizeInBits() != Query.MMODescrs[0].SizeInBits;
       })
-      .clampNumElements(0, v2s32, v2s32);
+      .clampNumElements(0, v2s32, v2s32)
+      .clampMaxNumElements(0, s64, 1);
 
   // Constants
   getActionDefinitionsBuilder(G_CONSTANT)

Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-fewerElts.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-fewerElts.mir?rev=345875&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-fewerElts.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-fewerElts.mir Thu Nov  1 12:01:53 2018
@@ -0,0 +1,39 @@
+# RUN: llc -march=aarch64 -o - -run-pass=legalizer -global-isel-abort=0 -debug-only=legalizer 2>&1 %s | FileCheck %s
+# REQUIRES: asserts
+
+# CHECK: Legalize Machine IR for: load_v4s32
+# CHECK-NEXT: %{{[0-9]+}}:_(<4 x s32>) = G_LOAD %{{[0-9]+}}:_(p0)
+# CHECK-NEXT: Reduce number of elements
+---
+name:            load_v4s32
+legalized:       false
+tracksRegLiveness: true
+body:             |
+  bb.1:
+    liveins: $x0
+
+    %0:_(p0) = COPY $x0
+    %1:_(<4 x s32>) = G_LOAD %0(p0) :: (load 16, align 4)
+    %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %1(<4 x s32>)
+    $w0 = COPY %5(s32)
+
+...
+
+# Make sure we are able to scalarize v2s64.
+# CHECK: Legalize Machine IR for: load_v2s64
+# CHECK-NEXT: %{{[0-9]+}}:_(<2 x s64>) = G_LOAD %{{[0-9]+}}:_(p0)
+# CHECK-NEXT: Reduce number of elements
+---
+name:            load_v2s64
+legalized:       false
+tracksRegLiveness: true
+body:             |
+  bb.1:
+    liveins: $x0
+
+    %0:_(p0) = COPY $x0
+    %1:_(<2 x s64>) = G_LOAD %0(p0) :: (load 16)
+    %2:_(s64), %3:_(s64) = G_UNMERGE_VALUES %1(<2 x s64>)
+    $x0 = COPY %3(s64)
+
+...

Removed: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir?rev=345874&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir (removed)
@@ -1,21 +0,0 @@
-# RUN: not llc -march=aarch64 -o - -run-pass=legalizer -debug-only=legalizer 2>&1 %s | FileCheck %s
-# REQUIRES: asserts
-
-# CHECK: Legalize Machine IR for: load_v4s32
-# CHECK-NEXT: %{{[0-9]+}}:_(<4 x s32>) = G_LOAD %{{[0-9]+}}:_(p0)
-# CHECK-NOT: Lower
-# CHECK: unable to legalize instruction
----
-name:            load_v4s32
-legalized:       false
-tracksRegLiveness: true
-body:             |
-  bb.1:
-    liveins: $x0
-
-    %0:_(p0) = COPY $x0
-    %1:_(<4 x s32>) = G_LOAD %0(p0) :: (load 16, align 4)
-    %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %1(<4 x s32>)
-    $w0 = COPY %5(s32)
-
-...