[PATCH] D53496: AMDGPU: Rewrite SILowerI1Copies to always stay on SALU

[Alexander via Phabricator via llvm-commits]

alex-t added a comment.

It seems like we have to further develop this approach to deal with the scalar comparison instructions.
For instance, S_CMP_* does not produce any result but implicitly defines SCC. 
Thus, InstrEmitter will insert the copies all the time. 
Since DAG operator SETCC produces i1 value there will be the SCC to VReg_1 copies.
I not trying to invent a method to lower that copies.
First issue:  in case all the uses are not divergent I don't need the V_CND_MASK -1,0 -> V_CMP_NE 0 pair
I need S_CSELECT -1, 0 immediately after the definition  (to save SCC) and  S_CMP_NE 0 just before use to rematerialize SCC
Second issue: I only need to save/restore if there are SCC defs in between.
So, we need to take into account not divergent flow as well.


Repository:
  rL LLVM

https://reviews.llvm.org/D53496